Chip design

Accelerate RTL-to-GDSII cycles

SemiconductorsAnalysisPlanningGitHub, Jira, Slack
How a run goes
The steps this agent takes, in order, and what each one leaves behind.
Ingests EDA tool reports and run logs

Tracks RTL-to-GDSII progress across blocks and flags critical-path slips

Correlates regressions against the last clean run

Surfaces timing, congestion, and DRC regressions the moment they appear

Posts a ranked punch list to the design channel

Drafts the engineering update with the numbers that changed

Works inGitHub, Jira, Slack

What it does

  • Tracks RTL-to-GDSII progress across blocks and flags critical-path slips
  • Surfaces timing, congestion, and DRC regressions the moment they appear
  • Drafts the engineering update with the numbers that changed

Connects to

Skills included

  • Timing-regression triage
  • DRC summary

Need it to work differently?

Every agent can be changed: the steps it takes, the systems it uses and who approves what.